/**
 * jailhouse, a Linux-based partitioning hypervisor
 *
 * Copyright (C), 2022, Kylinsoft Corporation.
 *
 * @author mashuai01@kylinos.cn
 * @date 2023.03.31
 * @brief 
 * @note 
 */

#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>

struct {
	struct jailhouse_cell_desc cell;
	__u64 cpus[1];
	struct jailhouse_memory mem_regions[10];
	struct jailhouse_irqchip irqchips[2];
	struct jailhouse_pci_device pci_devices[0];
} __attribute__((packed)) config = {
	.cell = {
		.signature = JAILHOUSE_CELL_DESC_SIGNATURE,
		.revision = JAILHOUSE_CONFIG_REVISION,
		.name = "e2000d-guest-eth",
		.flags = JAILHOUSE_CELL_PASSIVE_COMMREG,

		.cpu_set_size = sizeof(config.cpus),
		.num_memory_regions = ARRAY_SIZE(config.mem_regions),
		.num_irqchips = ARRAY_SIZE(config.irqchips),
		.num_pci_devices = ARRAY_SIZE(config.pci_devices),
        

		.vpci_irq_base = 102,

		.console = {
			.address = 0x2800d000,
			.type = JAILHOUSE_CON_TYPE_PL011,
			.flags = JAILHOUSE_CON_ACCESS_MMIO |
				 JAILHOUSE_CON_REGDIST_4,
		},
	},

	.cpus = {
		0x1,
	},

	.mem_regions = {
		/* IVSHMEM shared memory regions */
		{
			.phys_start = 0xa7000000,
			.virt_start = 0xa7000000,
			.size = 0x1000,
			.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
		},
		{
			.phys_start = 0xa7001000,
			.virt_start = 0xa7001000,
			.size = 0x9000,
			.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_ROOTSHARED,
		},
		{
			.phys_start = 0xa700a000,
			.virt_start = 0xa700a000,
			.size = 0x2000,
			.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
		},
		{
			.phys_start = 0xa700c000,
			.virt_start = 0xa700c000,
			.size = 0x2000,
			.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_ROOTSHARED,
		},
		{
			.phys_start = 0xa700e000,
			.virt_start = 0xa700e000,
			.size = 0x2000,
			.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
		},
		/* ETH 0 */
		{
			.phys_start = 0x3200c000,
			.virt_start = 0x3200c000,
			.size = 0x2000,
			.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
				JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
		},		
		/* UART */
		{
			.phys_start = 0x2800d000,
			.virt_start = 0x2800d000,
			.size = 0x1000,
			.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
				JAILHOUSE_MEM_IO  | JAILHOUSE_MEM_ROOTSHARED,
		},
	
		/* RAM */ 
		{
			.phys_start = 0xa2000000,
			.virt_start = 0,
			.size = 0x5000000,
			.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
				JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
		},
		{
		   	.phys_start = 0xa3000000,
			.virt_start = 0xa3000000,
			.size = 0xc000000,
			.flags= JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
				JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE |
				JAILHOUSE_MEM_DMA,
		
		
		},
		/* communication region */ 
		{
			.virt_start = 0x80000000,
			.size = 0x00001000,
			.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
				 JAILHOUSE_MEM_COMM_REGION,
		},
},
	.irqchips = {
		/* GIC */ {
			.address = 0x30800000,
			.pin_base = 32,
			.pin_bitmap = {
				1 << (60 - 32) | 1 << (61 - 32) | 1 << (62 - 32) | 1 << (63 - 32),
				1 << (87 - 64) | 1 << (88 - 64) | 1 << (89 - 64) | 1 << (90 - 64),
				1 << (116 - 96),
				0,
			},
		},
		{
			.address = 0x30800000,
			.pin_base = 256,
			.pin_bitmap = {
				0,
				0,
				0,
				0,
			},
		},
	},


	.pci_devices = {

	},

};
